An integrated circuit is typically designed to operate within a range of values for a number of different parameters. One such parameter is the voltage associated with the integrated circuit's power supply. Operating outside of a predetermined range of power supply voltages may result in improper operation of the integrated circuit. In order to prevent an integrated circuit from operating outside of the appropriate range of power supply voltages, the integrated circuit may be operated to periodically determine the voltage of the power supply. Improper operation of the integrated circuit may be prevented by slowing or halting the circuit's power consumption in response to measurements that indicate the power supply voltage is outside of the operating range.
The accuracy and/or operating efficiency of an integrated circuit may depend on the precision at which an integrated circuit is able to determine its own power supply voltage. If a measurement is taken that indicates the power supply voltage is in a permitted operating range when in fact it is not, incorrect calculations or data values may be produced by the integrated circuit. If a measurement is taken that indicates the power supply voltage is not in the permitted operating range when in fact it is, inefficient operation of the integrated circuit may result due to the fact that operations may be slowed or halted unnecessarily.
In determining power supply voltages, an integrated circuit may employ voltage-to-time conversion techniques. Here, a voltage is estimated based on the behavior of circuit elements whose operating speed varies with power supply variations in a predictable manner. More particularly, the operating speed of a number of circuit elements is measured over a fixed interval of time. Based on the measured operating speed, a voltage estimate may be obtained. The precision of the measurements depends on both the number of data points that can be taken and on the ability to observe as many of the data points as possible.
Conventional voltage-to-time conversion techniques may utilize delay circuits such as the inverter chain 100, shown in FIG. 1. The inverter chain 100 includes a number of inverters 104 interconnected in a chain. The inverter chain 100 may be sampled at intermediate points 108, which are located between the output of a given inverter 104 and the input of a subsequent inverter 104. The inverter chain 100 may be sampled at intermediate points 108 by a state element such as a flip-flop. In some configurations, a flip-flop evaluates based on a data signal and a complementary data bar signal. In conventional configurations, the data signal is received as an input and the data complement signal is internally generated. FIG. 2 is an illustration of a discrete portion 200 of a conventional flip-flip that may be used to internally generate the data complement signal. The flip-flop portion 200 includes a data line 204 that is received as an input to the flip-flop. In connection with voltage-to-time techniques, the data line 204 may be connected to a given intermediate point 108 in the delay chain 100. The flip-flop portion 200 includes an inverter 208, which receives the data line 204 as an input and produces a data complement line 212 as an output. The flip-flop portion 200 additionally includes differential pair transistors 216(a,b). The first differential pair transistor 216a is connected to the data line 204 and the second differential pair transistor 216b is connected to data complement line 212. The flip-flop evaluates based on signals output from the differential pair transistors at outputs 220(a,b).